[n] F. Y. Chang et al., “Dynamic Signal Analysis Based on FPGA for NSRRC DLLRF”, in Proc. IPAC'18, Vancouver, Canada, Apr.-May 2018, pp. 2295-2297. doi:10.18429/JACoW-IPAC2018-WEPAL053
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Paper Title: Dynamic Signal Analysis Based on FPGA for NSRRC DLLRF
Paper URL: http://accelconf.web.cern.ch/ipac2018/papers/WEPAL053.pdf
Conference: 9th Int. Particle Accelerator Conf. (IPAC'18)
Paper ID: WEPAL053
Location in proceedings: 2295-2297
Original Author String: F.Y. Chang, L.-H. Chang, M.H. Chang, S.W. Chang, L.J. Chen, F.-T. Chung, Y.T. Li, M.-C. Lin, Z.K. Liu, C.H. Lo, Ch. Wang, M.-S. Yeh, T.-C. Yu [NSRRC, Hsinchu, Taiwan]