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[n]	P. Bachek, G. Narayan, K. Mernick, M. Costanzo, and S. Mai, “Design of a standardized FPGA architecture for EIC common platform daughtercards”, in Proc. ICALEPCS'25, Chicago, IL, USA, Sep. 2025, paper MODR007, pp. 213-216. 

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Paper Title: Design of a standardized FPGA architecture for EIC common platform daughtercards
Conference: 20th International Conference on Accelerator and Large Experimental Control Systems (ICALEPCS'25)
Paper ID: MODR007
Location in proceedings: 213-216
Original Author String: P. Bachek, G. Narayan, K. Mernick, M. Costanzo, S. Mai

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