[n] M. Broseta et al., “Present and Future of Harmony Bus, a Real-Time High Speed Bus for Data Transfer Between FPGA Cores”, in Proc. ICALEPCS'17, Barcelona, Spain, Oct. 2017, pp. 1012-1016. doi:10.18429/JACoW-ICALEPCS2017-WEAPL01
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Paper Title: Present and Future of Harmony Bus, a Real-Time High Speed Bus for Data Transfer Between FPGA Cores
Paper URL: https://jacow.org/icalepcs2017/papers/WEAPL01.pdf
Conference: 16th Int. Conf. on Accelerator and Large Experimental Physics Control Systems (ICALEPCS'17)
Paper ID: WEAPL01
Location in proceedings: 1012-1016
Original Author String: M. Broseta, J.A. Avila-Abellan, S. Blanch-Torn?â?®, G. Cuni (G. Cun?¡), D. Fernandez-Carreiras (D. Fern?índez-Carreiras), O. Matilla, M. Rodriguez, J. Salabert, X. Serra-Gallifa [ALBA-CELLS Synchrotron, Cerdanyola del Vall?â?¿s, Spain]