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[n]	D. Dom?¡nguez, J. J. Gras, J. Lewis, J. J. Savioz, J. Serrano, and F. J. Ballester, “An FPGA Based Multiprocessing CPU for Beam Synchronous Timing in CERN's SPS and LHC”, in Proc. ICALEPCS'03, Gyeongju, Korea, Oct. 2003, paper MP531, pp. 113-115. 

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Paper Title: An FPGA Based Multiprocessing CPU for Beam Synchronous Timing in CERN's SPS and LHC
Paper URL: https://jacow.org/ica03/papers/MP531.pdf
Conference: 9th Int. Conf. on Accelerator and Large Experimental Physics Control Systems (ICALEPCS'03)
Paper ID: MP531
Location in proceedings: 113-115
Original Author String: D. Dom?¡nguez, J.J. Gras, J. Lewis, J.J. Savioz, J. Serrano (CERN) F.J. Ballester (UPV)

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