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[n] F. C. Badets et al., “A 4-Channel, 7 ns-Delay Tuning Range, 400 fs-Step, 1.8 ps RMS Jitter, Delay Generator Implemented in a 180 nm CMOS Technology”, in Proc. ICALEPCS'19, New York, NY, USA, Oct. 2019, pp. 734. doi:10.18429/JACoW-ICALEPCS2019-TUBPR02
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- F. C. Badets et al., “A 4-Channel, 7 ns-Delay Tuning Range, 400 fs-Step, 1.8 ps RMS Jitter, Delay Generator Implemented in a 180 nm CMOS Technology”, in Proc. 17th Int. Conf. on Accelerator and Large Experimental Physics Control Systems (ICALEPCS'19), New York, NY, USA, Oct. 2019, pp. 734.
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