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[n] J. M. Nogiec and P. Thompson, “Architecture of a Multi-Channel Data Streaming Device with an FPGA as a Coprocessor”, in Proc. ICALEPCS'21, Shanghai, China, Oct. 2021, pp. 724-728. doi:10.18429/JACoW-ICALEPCS2021-WEPV033
[n] G. Jug and A. Kosicek, “Libera LLRF - Development and Tests”, in Proc. IPAC'10, Kyoto, Japan, May 2010, paper TUPEA054, pp. 1455-1457.
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References
- J. M. Nogiec and P. Thompson, “Architecture of a Multi-Channel Data Streaming Device with an FPGA as a Coprocessor”, in Proc. 18th Int. Conf. on Accelerator and Large Experimental Physics Control Systems (ICALEPCS'21), Shanghai, China, Oct. 2021, pp. 724-728.
- G. Jug and A. Kosicek, “Libera LLRF - Development and Tests”, in Proc. 1st Int. Particle Accelerator Conf. (IPAC'10), Kyoto, Japan, May 2010, paper TUPEA054, pp. 1455-1457.
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