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[n]	J. Marjanovic, “Low vs High Level Programming for FPGA”, in Proc. IBIC'18, Shanghai, China, Sep. 2018, pp. 527-533. doi:10.18429/JACoW-IBIC2018-THOA01

[n]	Y. G??mez Mart?¡nez et al., “Last Spiral 2 Couplers Preparation and RF Conditioning”, in Proc. SRF'13, Paris, France, Sep. 2013, paper THP054, pp. 1036-1039. 

[n]	E. Chyhyrynets et al., “Plasma Electrolytic Polishing Technology Progress Development for Nb and Cu Substrates Preparation”, in Proc. SRF'23, Grand Rapids, MI, USA, Jun. 2023, paper MOPMB009, pp. 75-79. 

For LaTeX

%\cite{Marjanovic:IBIC18-THOA01} \bibitem{Marjanovic:IBIC18-THOA01} J. Marjanovic, \textquotedblleft{Low vs High Level Programming for FPGA}\textquotedblright, in \emph{Proc. IBIC’18}, Shanghai, China, Sep. 2018, pp. 527--533. \url{doi:10.18429/JACoW-IBIC2018-THOA01} %\cite{G??mez Mart?¡nez:SRF13-THP054} \bibitem{G??mez Mart?¡nez:SRF13-THP054} Y. G??mez Mart?¡nez \emph{et al.}, \textquotedblleft{Last Spiral 2 Couplers Preparation and RF Conditioning}\textquotedblright, in \emph{Proc. SRF’13}, Paris, France, Sep. 2013, paper THP054, pp. 1036--1039. %\cite{Chyhyrynets:SRF23-MOPMB009} \bibitem{Chyhyrynets:SRF23-MOPMB009} E. Chyhyrynets \emph{et al.}, \textquotedblleft{Plasma Electrolytic Polishing Technology Progress Development for Nb and Cu Substrates Preparation}\textquotedblright, in \emph{Proc. SRF’23}, Grand Rapids, MI, USA, Jun. 2023, paper MOPMB009, pp. 75--79.

For BibTeX

@inproceedings{marjanovic:ibic18-thoa01, author = {J. Marjanovic}, title = {{Low vs High Level Programming for FPGA}}, booktitle = {Proc. IBIC'18}, pages = {527--533}, paper = {THOA01}, venue = {Shanghai, China, Sep. 2018}, publisher = {JACoW Publishing, Geneva, Switzerland}, doi = {10.18429/JACoW-IBIC2018-THOA01}, url = {https://jacow.org/IBIC2018/papers/THOA01.pdf}, language = {english} } @inproceedings{g??mez mart?¡nez:srf13-thp054, author = {Y. G??mez Mart?¡nez and others}, title = {{Last Spiral 2 Couplers Preparation and RF Conditioning}}, booktitle = {Proc. SRF'13}, pages = {1036--1039}, paper = {THP054}, venue = {Paris, France, Sep. 2013}, publisher = {JACoW Publishing, Geneva, Switzerland}, url = {https://jacow.org/SRF2013/papers/THP054.pdf}, language = {english} } @inproceedings{chyhyrynets:srf23-mopmb009, author = {E. Chyhyrynets and others}, title = {{Plasma Electrolytic Polishing Technology Progress Development for Nb and Cu Substrates Preparation}}, booktitle = {Proc. SRF'23}, pages = {75--79}, paper = {MOPMB009}, venue = {Grand Rapids, MI, USA}, series = {International Conference on RF Superconductivity}, number = {21}, publisher = {JACoW Publishing, Geneva, Switzerland}, month = {8}, year = {2023}, issn = {2673-5504}, isbn = {978-3-95-450234-9}, language = {english} }

References

• J. Marjanovic, “Low vs High Level Programming for FPGA”, in Proc. 7th Int. Beam Instrumentation Conf. (IBIC'18), Shanghai, China, Sep. 2018, pp. 527-533.
• Y. G??mez Mart?¡nez et al., “Last Spiral 2 Couplers Preparation and RF Conditioning”, in Proc. 16th Int. Conf. RF Superconductivity (SRF'13), Paris, France, Sep. 2013, paper THP054, pp. 1036-1039.
• E. Chyhyrynets et al., “Plasma Electrolytic Polishing Technology Progress Development for Nb and Cu Substrates Preparation”, presented at the 21th Int. Conf. RF Superconductivity (SRF'23), Grand Rapids, MI, USA, Jun. 2023, paper MOPMB009, unpublished.