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[n]	J. A. Diaz Cruz, S. Biedron, S. V. Milton, A. L. Benwell, and A. Ratti, “LLRF Hardware Testbench”, in Proc. IPAC'17, Copenhagen, Denmark, May 2017, pp. 4821-4823. doi:10.18429/JACoW-IPAC2017-THPVA154
[n]	T. Bolin and S. Biedron, “C-band high-gradient linac design considerations for HPC modeling”, in Proc. IPAC'24, Nashville, TN, USA, May 2024, pp. 2676-2679. doi:10.18429/JACoW-IPAC2024-WEPR73
[n]	J. R. Zagel and B. E. Chase, “Feedback – Closing the Loop Digitall”, in Proc. ICALEPCS'91, Tsukuba, Japan, Nov. 1991, pp. 408-413. doi:10.18429/JACoW-ICALEPCS1991-S12FC01

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